This invention relates to production testing of integrated circuits, particularly production testing of a completed but unpackaged circuit die by measuring the current drawn by the circuit at a plurality of power nodes, to determine whether the circuit is defective or not.
Integrated circuits typically comprise a semiconductor substrate on which several component layers have been formed to produce a large number of laterally-distributed transistors and other circuit devices. Additional connection layers are formed on top of the component layers to provide interconnections among and power to the circuit devices, and input and output signal connections to the devices. Power is typically delivered to the devices by a grid of power conductors which pass through the conduction layers to the devices periodically and terminate at pads disposed on the top layer of the die, thereby minimizing the resistance encountered by the current. Also, typically, the pads alternate between power pads and ground pads, the input and output signal pads being interspersed among the power and ground pads. Thus, an integrated circuit can be somewhat likened architecturally to a multi-story office building, where the circuit devices are on the ground floor, the interconnections between the devices are made by the upper floors, the power connections are made between the ground floor and the roof by an interconnected lattice of support columns, and additional columns are provided for input and output signal connections between the ground floor and the roof.
An integrated circuit as described above is known as a “die.” Prior to distribution and use, a die is ordinarily placed in a hermetically-sealed package having pins or bumps for providing power, input and output connections to the circuit. As packaging adds significant cost to the final product, the die is ordinarily tested after fabrication is completed but before packaging to determine whether it is defective, in which case it is not packaged.
One known way to test a die is to measure the total quiescent current drawn by all of the power connection pads. If the total quiescent current significantly exceeds the maximum expected amount, then it can be concluded that the circuit has an internal short and is, therefore, defective. Another way to test a die is to measure the total current drawn by all of the power connection pads as a sequence of different input signal vectors is applied. An input vector is an ordered set of signals supplied to respective input signal connections. If the total current is significantly more or less than that expected for a given input vector, then it may be concluded that the circuit is defective, due either to a short or an open circuit. A third way to test a die is to measure the quiescent current at a plurality of power connection pads, thereby enabling the detection and localization of a shorting defect. To accomplish this, a calibration circuit must be embedded in the integrated circuit. These tests are described in C. Patel, E. Staroswiecki, S. Pawar, D. Acharyya and J. Plusquellic, “Diagnosis using Quiescent Signal Analysis on a Commercial Power Grid,” International Symposium for Testing and Failure Analysis, pp. 713–722, 2002 (Pheonix, Ariz.).
While quiescent current measurements can be used to identify and locate some types of defects, other types of defects do not manifest in the steady state currents of quiescent measurements. Accordingly, an improved, more comprehensive testing procedure and apparatus would be desirable. In addition, it would be desirable to take into account the manufacturing and testing variability that occurs with power supply current testing so as to identify and locate defects more accurately.